When your STM32 processor starts up from a reset, there are a number of possible sources for that reset. You may want to perform different initialisations depending on the exact source of the reset.
A single register holds the flags which tell you why the processor was reset. It is the RCC clock control & status register (RCC_CSR) register.
A system reset is generated when one of the following events occurs:
- A low level on the NRST pin (external reset)
- Window watchdog end of count condition (WWDG reset)
- Independent watchdog end of count condition (IWDG reset)
- A software reset (SW reset)
- Low-power management reset
Each of these works by pulling the NRST line low for 20 microseconds. There is also a power reset caused by the power supply dropping below a level needed to keep the processor running.
A typical implementation will have the NRST line connected externally to a processor supervisor chip or a simple RC circuit that brings the NRST line high more slowly than the power line.
A reset can also be caused by and external circuit or switch bringing the NRST line low briefly. This kind of reset is called a PIN reset.
The result of these actions is that all resets will look like pin resets since they will all cause the most recent action to be the NRST line going high. Thus, when looking for what caused the last reset, it is not enough to simply look at the pin reset flag. First, the code must examine the other reset sources to see if any of them were responsible and test the pin reset last.
In the RCC_CSR register, the bits to look for are:
- Bit31: LPWRRSTF – Low-power reset flag
Set by hardware when a Low-power management reset occurs. - Bit30: WWDGRSTF – Window watchdog reset flag
Set by hardware when a window watchdog reset occurs. - Bit29: IWDGRSTF – Independent watchdog reset flag
Set by hardware when an independent watchdog reset from VDD domain occurs. - Bit28: SFTRSTF – Software reset flag
Set by hardware when a software reset occurs. - Bit27: PORRSTF – POR/PDR reset flag
Set by hardware when a POR/PDR reset occurs. - Bit26: PINRSTF – PIN reset flag
Set by hardware when a reset from the NRST pin occurs. - Bit25: BORRSTF – BOR reset flag
Set by hardware when a POR/PDR or BOR reset occurs.
You may choose to examine these directly of make use of the Standard Peripheral Library functions. Note that, the status of these flags will survive a subsequent reset! That means, for example, that, if you have a power up reset and then press the reset button, the system still records the fact that there was a power up reset. To sort that out, you need to clear the flags after they have been used. This is done by writing a 1 to bit 24, the RMVF bit, in RCC_CSR. Again, this can be done directly or through a Peripheral Library function.
Here is a code fragment that should illustrate the technique of determning the most recent reset source. In this code, I write a message out to a display to show me what caused the reset.
// test the reset flags in order because the pin reset is always set.
if (RCC_GetFlagStatus(RCC_FLAG_SFTRST)){
HCMS3907_puts("SFT ");
} else if (RCC_GetFlagStatus(RCC_FLAG_PORRST)){
HCMS3907_puts("PWR ");
} else if (RCC_GetFlagStatus(RCC_FLAG_PINRST)){
HCMS3907_puts("PIN ");
} else {
HCMS3907_puts("?RST");
}
// The flags must be cleared manually after use
RCC_ClearFlag();
For full details, see section 5.1 in the STM32 Processor Reference Manual
Hi Pete,
Which toolsuite are you using for your STM32 F4? IAR?
Regards,
Dave
I use Rowley’s Crossworks for ARM.
Hi again Peter,
An unrelated question:
I’m thinking of buying faulhaber motors in my price range (1524) but they come equipped with really poor encoders (1cpr) As these would be my first Faulhaber motors I wanted to ask how are they built? Is it possible to strip away the encoder and add a simple optical encoder or is the shaft extended so that I could use a magnetic encoder (as in as5035 or as5040)?
Keep up the good work with decimus 4!
Cheers
Can’t say that I have ever seen Faulhaber motors with a single count per rotation. Considering the price, I would caution against taking them apart. there are other possibilities that you might consider. The AS5040 devices can be mounted on the drive wheel axle to give adequate resolution if the wheels are not too big.
Cheers for the info here – this helped me get to where I needed to get!
I have a problem hope you help me!
that’s after Clear reset flag (RCC->CSR |= 0x0100000000 with stm32f103rct6) if reset MCU then MCU not working. remove function clear reset flag & program again also mcu not working until turn off all power and turn on again.
If you are trying to set the RMVF bit in RCC, you have the wrong bit position. From the reference manual (RM0008 – sec 6.3.10) RMVF is in bit 24 so your line of code should be
RCC->CSR |= 0x01000000;or
Hi sir,
am working with stm32f746zg micro controller. while am working on stm 32 board it was reseting for every 13 mins.
i didnot understand which is causing this reset. after reset am losing my serial port connection.
Thanks in advance
perhaps you have enabled the watchdog timer.
am not enabling the watchdog timer………..
but in my pc am changing some settings
device manager -> disk drives -> ebed microcontroller usb device am disabling this option.
then my reset problem was gone.
i didn’t understand why this ebed microcontroller usb device creaating this reset problem. my pc is dell (windows 10 am using).
Thanks in advance
Sorry, I am not familiar with the embed device. Perhaps your PC tries to put what it sees as an external disk to sleep and that causes the firmware to reset.
Thanks for an interesting post, Peter.
Two things I’d like to add:
1) In answer to saiteja’s post: yes, that’s exactly what Windows is doing. It took me a long time to work this out too. The STM32 boards implement a USB mass storage device. Left plugged in, Windows periodically disconnects this device, causing the board to reset on re-connect.
2) One point regarding the watchdogs which has caught me out: If an external pull-up on the rest pin is too strong (in my case, using another micro pin to drive it), the watchdog(s) will not be able to reset the processor. It’s not the watchdog timeout that resets the processor and pulls the reset line low. It’s the watchdog timeout pulling the reset line low that resets the micro. A subtle but important difference.
Cheers.
Thanks for sharing something great.
It helps a lot.