With googletest set up for use with the the Netbeans IDE it is relatively easy to start working on your code using Test Driven Development Methods. This article shows you how to develop a simple set of library functions using TDD. (more…)
Netbeans is my favoured IDE for C/C++ development. It has some support for test driven development but not for Googletest which I like for its simplicity. Find out how to use Googletest in Netbeans for embedded TDD. (more…)
The STM32 Family processors include general purpose timers that have a nice PWM function that can handle four channels of independently controlled duty cycles. In this article I will look at how to set these up for basic use suitable for the majority of applications that need PWM signals. (more…)
The CCRx registers can be set to directly produce regular clock pulses on one or more of the output pins. Square waves are especially simple and up to four channels can have variable phase relationships. (more…)
TIM3 is a general purpose timer found on all the STM32 family processors. Among other features, it has four capture compare channels that can be used to generate regular interrupts. In this article I will show you how to set up simple interrupt events based on these features. (more…)
The simplest way to produce regular interrupts from a timer like TIM3 on the STM32 family of processors is to set up the Auto Reload Register (ARR) to generate an update event. This article shows you how to correctly set up the clock source, prescaler and ARR to get regular events over a wide range of frequencies. (more…)
Timer 3 (TIM3) on the STM32 series of processors is one of only two timers present on all the processors in the range. Understanding this timer forms a good basis for all the other STM32 timers
The ARM cortex M4 and M3 processors all come with a systick timer that is part of the core. The other variants, such as the M0 may not have one. This timer is very useful for producing the main system event clock. Here I will show you how to set it up on the STM32F4xx processors to generate an interrupt every millisecond. (more…)